The invention generally relates to solid-state imaging devices and cameras. More particularly, the invention relates to a solid-state imaging device and a camera provided with the solid-state imaging device.
Solid-state imaging devices are classified broadly into amplification type solid-state imaging devices, which are typically exemplified by CMOS (complementary metal-oxide semiconductor) image sensors, and charge transfer type imaging devices, which are typified by CCD (charge-coupled device) image sensors.
CMOS image sensors have replaced CCD sensors at rapid speed particularly in the area of portable device-oriented image sensors owning to high performance and low power consumption characteristics. Such a CMOS image sensor includes an imaging section having a plurality of pixels arranged in a two-dimensional array, each of the pixels including a photodiode (PD) serving as a photoelectric conversion element and several pixel transistors; and peripheral circuits arranged around the imaging section.
The peripheral circuits include at least column circuits or vertical driving circuits for transmitting signals in the column direction, and horizontal circuits or horizontal driving circuits for sequentially transferring the signals, which are transmitted column wise by the column circuits, to an output circuit. The pixel transistors are provided having known configurations such as, for example, four-transistor circuit configuration including transfer, reset, amplifying, and selection transistors; and three-transistor circuit configuration including transfer, reset, and amplifying transistors excepting the selection transistor.
A CMOS image sensor is generally provided by arranging a plurality of unit pixels, in which each of the unit pixels includes one photodiode and several pixel transistors, as a set. However, miniaturization of the pixel size has been notable in recent years. With regard to the CMOS image sensor including a large number of pixels, many attempts have been disclosed on CMOS image sensors of the type of sharing pixel transistors with a plurality of pixels to thereby reduce the number of pixel transistors.
One of the CMOS image sensors sharing pixel transistors is disclosed, for example, in Japanese Unexamined Patent Application Publication No. Heisei 11 (1999)-331713 which will be given shortly.
On the other hand, another disclosure is made in which the transfer efficiency of charges can be increased by suitably devising the structure of transfer gate in miniaturized design of the pixel. For example, disclosed in Japanese Unexamined Patent Application Publication No. 2005-129965 (in paragraph 0039 and FIG. 3 therein) is that a photodiode PD, a floating diffusion (FD) region 101, and a transfer transistor Tr1 as one of the pixel transistors are formed as a part of pixel, as illustrated in FIG. 1. The transfer transistor Tr1 includes a transfer gate electrode 102 and a channel region 103 formed directly thereunder. Also, in the transfer transistor Tr1, the edge of a transfer gate 104, or of the transfer gate electrode 102, toward the photodiode PD, is formed in the shape of convex so that the electric field is generated in the photodiode PD toward the transfer gate 104 with more ease. It may be noted in the structure of FIG. 1 that the channel width “a” of the transfer gate 104 on the side of photodiode PD (i.e., the channel width in contact with the photodiode PD), is larger than the channel width “b” on the side of floating diffusion (FD) region 101 (i.e., the channel width in contact with the floating diffusion (FD) region 101).